{"id":6852,"date":"2021-06-25T11:10:01","date_gmt":"2021-06-25T08:10:01","guid":{"rendered":"https:\/\/www.weebit-nano.com\/?post_type=press_release&#038;p=6852"},"modified":"2022-04-04T11:32:52","modified_gmt":"2022-04-04T08:32:52","slug":"weebit-nano-successfully-demonstrates-integration-of-selector-with-reram-cell-for-the-stand-alone-memory-market","status":"publish","type":"press_release","link":"https:\/\/www.weebit-nano.com\/news\/press-releases\/weebit-nano-successfully-demonstrates-integration-of-selector-with-reram-cell-for-the-stand-alone-memory-market\/","title":{"rendered":"Weebit Nano successfully demonstrates integration of selector with ReRAM cell for the stand-alone memory market"},"content":{"rendered":"<ul>\n<li>Industry\u2019s first commercial integration of OTS selector with oxide-based ReRAM<\/li>\n<li>Key technology milestone achieved three months ahead of schedule<\/li>\n<\/ul>\n<p><strong>25 June, 2021<\/strong> \u2013 <strong>Weebit Nano Limited<\/strong> (ASX:WBT), a leading developer of next-generation semiconductor memory technologies, is pleased to announce it has created the industry\u2019s first commercial integration of an oxide-based ReRAM (<strong>OxRAM<\/strong>) cell with an ovonic threshold switching (<strong>OTS<\/strong>) selector, a critical step in the company\u2019s commercialisation path for the discrete (stand-alone) memory market.<\/p>\n<p>This achievement is a significant step towards broadening Weebit\u2019s target market beyond embedded non-volatile memory (NVM) to include discrete memory technology, and will enable the implementation of 3D memory stacking and crossbar architectures in future developments. Weebit and its development partner <strong>CEA-Leti<\/strong> achieved this key milestone three months ahead of Weebit\u2019s previously announced schedule.<\/p>\n<p>A <strong>selector<\/strong> is a key element of a memory chip, enabling optimised cell access within a memory array. It assists in isolating memory cells so only the specific cells that should be accessed are, and all the other cells are not impacted. In the embedded space, a transistor is typically used as the selector device, but a transistor does not support the densities required for discrete chips. OTS is an ideal selector technology for discrete <strong>ReRAM<\/strong> chips as it enables the smallest ReRAM <strong>bit cell<\/strong>, as small as <strong>4F<sup>2<\/sup><\/strong>, as well as excellent endurance, low energy consumption, and high switching speed.<\/p>\n<p>\u201cNew markets like IoT, 5G and AI are driving needs for emerging NVM on advanced process nodes,\u201d said Jim Handy, Memory Analyst, <strong>Objective Analysis<\/strong>. \u201cWeebit\u2019s combination of ReRAM with an OTS selector promises to scale to the advanced processes and high memory densities that new memory chips will need.\u201d<\/p>\n<p>According to Gabriel Molas, Senior Scientist at CEA-Leti, \u201cCreation of an OTS selector is quite a complex endeavor given the concurrent requirements to achieve high endurance, reduce variability, and maintain characteristics at high temperature operation. As such, this selector is based on several years of research by a dedicated team. We\u2019re delighted to have worked with Weebit to achieve this milestone for its ReRAM technology more quickly than anticipated, and we look forward to continuing our joint R&amp;D work with Weebit on further innovations.\u201d<\/p>\n<p>Coby Hanoch, CEO of Weebit, said, \u201cThis achievement demonstrates our commitment to addressing the discrete memory market as part of our mid-term strategy. We see a broad range of opportunities for discrete ReRAM, from NOR flash to storage class memory, in a range of segments. Given our 2024 target for a discrete solution, we anticipate that other opportunities will arise as well. We will continue to share our progress in meeting this mid-term goal, while we continue our near-term focus on the embedded memory module where we are making good progress.\u201d<\/p>\n<p>Mr. Hanoch recently spoke about the future of semiconductor memory during the <strong>Leti Innovation Days<\/strong> event. To watch a video of his presentation, visit <a href=\"https:\/\/youtu.be\/UGXHz_pMUJk\" target=\"_blank\" rel=\"noopener\">https:\/\/youtu.be\/UGXHz_pMUJk<\/a>.<\/p>\n<p>Follow Weebit on its new Twitter account at: <a href=\"https:\/\/twitter.com\/WeebitNano\" target=\"_blank\" rel=\"noopener\">@WeebitNano<\/a><br \/>\nThis announcement has been authorised for release by the Board of Weebit Nano.<\/p>\n<h3>About Weebit Nano<\/h3>\n<p>Weebit Nano Ltd. is a leading developer of next-generation semiconductor memory technology. The company\u2019s ground-breaking Resistive RAM (ReRAM) addresses the growing need for significantly higher performance and lower power memory solutions in a range of new electronic products such as Internet of Things (IoT) devices, smartphones, robotics, autonomous vehicles, 5G communications and artificial intelligence. Weebit\u2019s ReRAM allows semiconductor memory elements to be significantly faster, less expensive, more reliable and more energy efficient than those using existing Flash memory solutions. Because it is based on fab-friendly materials, the technology can be quickly and easily integrated with existing flows and processes, without the need for special equipment or large investments. See: <a href=\"http:\/\/www.weebit-nano.com\">www.weebit-nano.com<\/a> or follow us on <a href=\"https:\/\/twitter.com\/WeebitNano\" target=\"_blank\" rel=\"noopener\">https:\/\/twitter.com\/WeebitNano<\/a>.<\/p>\n<p>Weebit Nano and the Weebit Nano logo are trademarks or registered trademarks of Weebit Nano Ltd. in the United States and other countries. Other company, product, and service names may be trademarks or service marks of others.<\/p>\n<p><strong>Explanation of Technical Terms<\/strong><br \/>\n<strong>4F<sup>2<\/sup><\/strong>: Memory cell sizes are measured using an nF\u00b2 formula where \u2018n\u2019 is a constant derived from the cell design and \u2018F\u2019 is the feature size of the process technology. For example, in a 130nm process node, F = 0.13 micron, and therefore 4F2 = 4 x 0.13 x 013 = 0.0676 square micron. For the same feature size, as the cell size becomes smaller, memory capacity increases.<\/p>\n<p><strong>Bit cell<\/strong>: A bit cell is the basic building block of a memory array, and in turn, of a memory chip. Each cell comprises a tiny circuit with a memory element and a selector element. The memory element stores data (either a 1 or 0) and the selector activates the cell when accessed.<\/p>\n<p>&nbsp;<\/p>\n","protected":false},"featured_media":0,"template":"","meta":{"_acf_changed":false,"_links_to":"","_links_to_target":""},"class_list":["post-6852","press_release","type-press_release","status-publish","hentry"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v26.1 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Weebit Nano successfully demonstrates integration of selector with ReRAM cell for the stand-alone memory market | Weebit<\/title>\n<meta name=\"description\" content=\"Weebit PR about Weebit Nano successfully demonstrates integration of selector with ReRAM cell for the stand-alone memory market\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" 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