\nThe 1T1R (one transistor one resistor) architecture used in embedded ReRAM arrays is not sufficient to support the large arrays of memory cells needed in discrete (stand-alone) memory chips. For this reason, Weebit\u2019s crossbar arrays were developed using a 1S1R (one selector one resistor) architecture that enables the high density needed for discrete chips. Such an architecture also allows Weebit\u2019s arrays to be stacked in 3D layers so they can deliver even higher densities.<\/p>\n
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Weebit\u2019s 1S1R crossbar ReRAM architecture has potential applications in storage class memory, persistent memory and as a NOR flash replacement. It is also ideal for AI architectures such as in-memory computing and neuromorphic computing.<\/p>\n
Commenting on the Company\u2019s latest technology development milestone, CEO Coby Hanoch said:<\/strong><\/p>\n \u201cWeebit Nano continues to make significant technical and commercial progress within the embedded sector \u2013 recently successfully scaling our ReRAM technology down to 28nm. Now, with the creation of our first kilobit crossbar arrays, we\u2019re continuing our progress toward discrete memory solutions. Developing such a crossbar array is a very innovative process that requires significant research. As part of this work, we recently filed several new patents together with CEA-Leti, designed to further protect Weebit\u2019s ReRAM intellectual property, with a focus on 1S1R architectures and selector cell programming.\u201d<\/p>\n This announcement has been authorised for release by the Board of Weebit Nano Limited.<\/p>\nAbout Weebit Nano Limited<\/h3>\n