{"id":6205,"date":"2022-04-02T12:22:35","date_gmt":"2022-04-02T09:22:35","guid":{"rendered":"https:\/\/www.weebit-nano.com\/investors\/glossary\/"},"modified":"2022-04-27T18:15:45","modified_gmt":"2022-04-27T15:15:45","slug":"glossary","status":"publish","type":"page","link":"https:\/\/www.weebit-nano.com\/investors\/glossary\/","title":{"rendered":"Glossary"},"content":{"rendered":"\t\t<div data-elementor-type=\"wp-page\" data-elementor-id=\"6205\" class=\"elementor elementor-6205\" data-elementor-post-type=\"page\">\n\t\t\t\t<div class=\"elementor-element elementor-element-6e6547c e-flex e-con-boxed e-con e-parent\" data-id=\"6e6547c\" data-element_type=\"container\" data-settings=\"{&quot;background_background&quot;:&quot;video&quot;,&quot;background_video_link&quot;:&quot;https:\\\/\\\/www.weebit-nano.com\\\/wp-content\\\/uploads\\\/2022\\\/04\\\/Weebit_bg.webm&quot;}\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t<div class=\"elementor-background-video-container elementor-hidden-mobile\" aria-hidden=\"true\">\n\t\t\t\t\t\t\t<video class=\"elementor-background-video-hosted\" autoplay muted playsinline loop><\/video>\n\t\t\t\t\t<\/div>\t\t<div class=\"elementor-element elementor-element-f3ddf78 elementor-widget elementor-widget-heading\" data-id=\"f3ddf78\" data-element_type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<div class=\"elementor-heading-title elementor-size-default\">Investors<\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<div class=\"elementor-element elementor-element-047f5d3 elementor-widget elementor-widget-heading\" data-id=\"047f5d3\" data-element_type=\"widget\" data-widget_type=\"heading.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t<h1 class=\"elementor-heading-title elementor-size-default\">Glossary<\/h1>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t<div class=\"elementor-element elementor-element-ee518ee e-flex e-con-boxed e-con e-parent\" data-id=\"ee518ee\" data-element_type=\"container\">\n\t\t\t\t\t<div class=\"e-con-inner\">\n\t\t\t\t<div class=\"elementor-element elementor-element-0c7192f elementor-widget elementor-widget-shortcode\" data-id=\"0c7192f\" data-element_type=\"widget\" data-widget_type=\"shortcode.default\">\n\t\t\t\t<div class=\"elementor-widget-container\">\n\t\t\t\t\t\t\t<div class=\"elementor-shortcode\"><div class=\"wpg-list-wrapper wpg-list-wrapper-template-alphabet\"><div class=\"wpg-list-filter-container\"><div class=\"wpg-list-filter\"><span class=\"wpg-list-filter-row\"><a class=\" filter active\" data-filter=\"all\">All<\/a><a class=\" filter\" data-filter=\".wpg-filter-0-9\">0-9<\/a><a class=\" filter\" data-filter=\".wpg-filter-a\">A<\/a><a class=\" filter\" data-filter=\".wpg-filter-b\">B<\/a><a class=\" filter\" data-filter=\".wpg-filter-c\">C<\/a><a class=\" filter\" data-filter=\".wpg-filter-d\">D<\/a><a class=\" filter\" data-filter=\".wpg-filter-e\">E<\/a><a class=\" filter\" data-filter=\".wpg-filter-f\">F<\/a><a class=\" filter\" data-filter=\".wpg-filter-g\">G<\/a><a class=\" filter\" data-filter=\".wpg-filter-h\">H<\/a><a class=\" filter\" data-filter=\".wpg-filter-i\">I<\/a><a class=\" filter-disable\" data-filter=\".wpg-filter-j\">J<\/a><a class=\" filter-disable\" data-filter=\".wpg-filter-k\">K<\/a><a class=\" filter\" data-filter=\".wpg-filter-l\">L<\/a><a class=\" filter\" data-filter=\".wpg-filter-m\">M<\/a><a class=\" filter\" data-filter=\".wpg-filter-n\">N<\/a><a class=\" filter\" data-filter=\".wpg-filter-o\">O<\/a><a class=\" filter\" data-filter=\".wpg-filter-p\">P<\/a><a class=\" filter\" data-filter=\".wpg-filter-q\">Q<\/a><a class=\" filter\" data-filter=\".wpg-filter-r\">R<\/a><a class=\" filter\" data-filter=\".wpg-filter-s\">S<\/a><a class=\" filter\" data-filter=\".wpg-filter-t\">T<\/a><a class=\" filter-disable\" data-filter=\".wpg-filter-u\">U<\/a><a class=\" filter\" data-filter=\".wpg-filter-v\">V<\/a><a class=\" filter\" data-filter=\".wpg-filter-w\">W<\/a><a class=\" filter-disable\" data-filter=\".wpg-filter-x\">X<\/a><a class=\" filter\" data-filter=\".wpg-filter-y\">Y<\/a><a class=\" filter-disable\" data-filter=\".wpg-filter-z\">Z<\/a><\/span><\/div><\/div><div class=\"wpg-list-search-form wpg-list-search-form-position-below\"><input type=\"text\" placeholder=\"Search by Keyword ...\" value=\"\" \/><\/div><div class=\"wpg-list wpg-list-template-four-column\"><div class=\"wpg-list-block wpg-filter-0-9 mix\" data-filter-base=\"0-9\"><h3 class=\"wpg-list-block-heading\">0-9<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;1S1R&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;One Selector One Resistor (1S1R) is a random access memory device in which the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/selector\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;selector&lt;\/a&gt; isolates the electrical current to cells that are selected from those that are not, and the resistor stores the information. Compared to a traditional One &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/transistor\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Transistor&lt;\/a&gt; One Resistor (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/1t1r\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;1T1R&lt;\/a&gt;) device which needs 3 terminals (Source line, Bitline and Wordline), 1S1R is a 2-terminal device which can be used in &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/crossbar\/&quot;&gt;crossbar&lt;\/a&gt; architecture that has only a Bitline and Wordline) and can therefore enable higher density as well as 3D integration.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/1s1r\/\" >1S1R<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;1T1R&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;One &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/transistor\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Transistor&lt;\/a&gt; One Resistor (1T1R) is a random access &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/memory-cell\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;memory cell&lt;\/a&gt; device in which the transistor isolates the electrical current to cells that are selected from those that are not. The transistor acts as a switch to turn on the access to the memory cell once addressed and programmed, controls the current flowing through the Resistor at ON state, and turns off the transistor once the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot;&gt;RRAM&lt;\/a&gt;) cell is unselected.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/1t1r\/\" >1T1R<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;4F&lt;sup&gt;2&lt;\/sup&gt;&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;&lt;strong&gt;4F&lt;sup&gt;2\u00a0 &lt;\/sup&gt;&lt;\/strong&gt;- Memory cell sizes are measured using an nF\u00b2 formula where \u2018n\u2019 is a constant derived from the cell design and \u2018F\u2019 is the feature size of the process technology. For example, in a 130nm process node, F = 0.13 micron, and therefore 4F&lt;sup&gt;2&lt;\/sup&gt; = 4 x 0.13 x 013 = 0.0676 square micron. For the same feature size, as the cell size becomes smaller, memory capacity increases.&lt;\/p&gt;\n&lt;p&gt;&lt;strong&gt;&lt;sup&gt;\u00a0&lt;\/sup&gt;&lt;\/strong&gt;&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/4f-2\/\" >4F<sup>2<\/sup><\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-a mix\" data-filter-base=\"a\"><h3 class=\"wpg-list-block-heading\">A<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Access Time&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;\u2018Access Time\u2019 refers to how long it takes to read data or write data to a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/memory-cell\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;memory cell&lt;\/a&gt;.&lt;br \/&gt;\nAccess time directly affects the speed of the system: the shorter the access time is, the faster the system can operate.&lt;\/p&gt;\n&lt;p&gt;&lt;img class=&quot;aligncenter wp-image-11594 &quot; src=&quot;https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/05\/Fast_Access_Time.svg&quot; alt=&quot;&quot; width=&quot;728&quot; height=&quot;388&quot; \/&gt;&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/access-time\/\" >Access Time<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Analog ICs&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Analog ICs represent a diverse set of technologies including sensors, power management &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ICs&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/pmic\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;PMIC&lt;\/a&gt;s), mixed-signal ICs, RF, MEMS, and others. These devices increasingly require embedding low-density &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot;&gt;NVM&lt;\/a&gt;.&lt;\/p&gt;\n&lt;p&gt;&nbsp;&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/analog-ics\/\" >Analog ICs<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-b mix\" data-filter-base=\"b\"><h3 class=\"wpg-list-block-heading\">B<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;BCD \/ BCDMOS&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;With a BCD process, it possible to integrate and manufacture analog components (bipolar), digital components (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/cmos\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;CMOS&lt;\/a&gt;), and high-voltage power transistors (DMOS) on the same &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/die\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;die&lt;\/a&gt;.&lt;\/p&gt;\n&lt;p&gt;This is a complex technology that provides advantages for a large set of analog and power products including power management &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot;&gt;ICs&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/pmic\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;PMIC&lt;\/a&gt;s).&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/bcd-bcdmos\/\" >BCD \/ BCDMOS<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;BEOL Memory&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Semiconductor manufacturing includes both &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/feol-front-end-of-line-memory\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;front-end-of-line (FEOL)&lt;\/a&gt; and back-end-of-line (BEOL) processes. In FEOL, the integrated circuit is formed on the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/glossary\/wafer\/&quot;&gt;wafer&lt;\/a&gt; substrate. While FEOL defines and makes the transistors \u2013 which are the switching elements used for computing \u2013 the BEOL represents the interconnecting layers which connect the transistors on the wafer using metal layer processing techniques. Weebit\u2019s &lt;a href=&quot;https:\/\/www.weebit-nano.com\/glossary\/reram\/&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;RRAM&lt;\/a&gt;) is integrated during the BEOL process.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/beol-memory\/\" >BEOL Memory<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Bit Cell&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A bit cell, or a Bitcell, is the basic building block of a memory array, and in turn, of a memory &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chip&lt;\/a&gt;. Each cell comprises a tiny circuit with a memory element and a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/glossary\/selector\/&quot;&gt;selector&lt;\/a&gt; element. The memory element stores data (either a 1 or 0) and the selector activates the cell when accessed.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/bit-cell\/\" >Bit Cell<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Bit Error Rate (BER)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Bit Error Rate (BER) is a key metric used to evaluate the reliability of memory devices. It represents the ratio of incorrectly stored or retrieved bits to the total number of bits processed over a given period. BER is an important metric for memory devices because it affects the reliability of the data stored in the memory.&lt;\/p&gt;\n&lt;p&gt;Mathematically, it is expressed as:&lt;\/p&gt;\n&lt;p&gt;BER = (Number\u00a0of\u00a0erroneous\u00a0read bits) \/ (Total\u00a0number\u00a0of\u00a0stored\u00a0bits)&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/bit-error-rate-ber\/\" >Bit Error Rate (BER)<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-c mix\" data-filter-base=\"c\"><h3 class=\"wpg-list-block-heading\">C<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Characterization&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Once initial &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chips&lt;\/a&gt; are available, device characterization begins. Using production testing equipment, the process is focused on gathering as much data as possible about a semiconductor device to assess functionality, determine optimal operating conditions, discover potential sensitivities and define the final specification limits.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/characterization\/\" >Characterization<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Chip&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A packaged &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/die\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;die&lt;\/a&gt;, that can be integrated into a circuit board.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/chip\/\" >Chip<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;CMOS&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Complementary metal oxide semiconductor (CMOS) is the building block of today\u2019s digital &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot;&gt;integrated circuits&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot;&gt;ICs&lt;\/a&gt;). CMOS is the mainstay of the silicon industry in which almost all digital, analog and mixed-signal integrated circuits \u2013 including memory &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chips&lt;\/a&gt; \u2013 are created.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/cmos\/\" >CMOS<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;CPU&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Central Processing Unit&lt;strong&gt;, &lt;\/strong&gt;it is the\u00a0&lt;a href=&quot;https:\/\/en.wikipedia.org\/wiki\/Electronic_circuit&quot;&gt;electronic circuitry&lt;\/a&gt;\u00a0within a\u00a0&lt;a href=&quot;https:\/\/en.wikipedia.org\/wiki\/Computer&quot;&gt;computer&lt;\/a&gt;\u00a0where the computation and calculation takes place within a semiconductor &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chip&lt;\/a&gt;. It is done by execution of\u00a0&lt;a href=&quot;https:\/\/en.wikipedia.org\/wiki\/Instruction_(computing)&quot;&gt;instructions&lt;\/a&gt;\u00a0that make up a\u00a0&lt;a href=&quot;https:\/\/en.wikipedia.org\/wiki\/Computer_program&quot;&gt;computer program&lt;\/a&gt;. The CPU performs basic\u00a0&lt;a href=&quot;https:\/\/en.wikipedia.org\/wiki\/Arithmetic&quot;&gt;arithmetic&lt;\/a&gt;, logic, controlling, and\u00a0&lt;a href=&quot;https:\/\/en.wikipedia.org\/wiki\/Input\/output&quot;&gt;input\/output&lt;\/a&gt; (I\/O) operations specified by the instructions in the program.&lt;strong&gt;&lt;br \/&gt;\n&lt;\/strong&gt;&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/cpu\/\" >CPU<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Cross-Section&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Cross-section photos of a semiconductor device are taken using a Scanning Electron Microscope (SEM) or Transmission Electron Microscope (TEM), which can capture the individual layers and miniature features of the device.&lt;\/p&gt;\n&lt;p&gt;&lt;img class=&quot;aligncenter wp-image-12118 size-large&quot; src=&quot;https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/07\/Weebit-Nano-Cross-section-ReRAM-or-RRAM-1024x749.png&quot; alt=&quot;&quot; width=&quot;800&quot; height=&quot;585&quot; \/&gt;&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/cross-section\/\" >Cross-Section<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Crossbar&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Crossbar architectures are designed to enable the highest density memory in the smallest silicon footprint and can be stacked in 3D layers to deliver even higher densities.&lt;\/p&gt;\n&lt;p&gt;&lt;img class=&quot;aligncenter wp-image-12116 size-large&quot; src=&quot;https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/07\/Weebit-Nano-crossbar-ReRAM-arrays-1024x457.png&quot; alt=&quot;&quot; width=&quot;800&quot; height=&quot;357&quot; \/&gt;&lt;\/p&gt;\n&lt;p&gt;&nbsp;&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/crossbar\/\" >Crossbar<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-d mix\" data-filter-base=\"d\"><h3 class=\"wpg-list-block-heading\">D<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Data Retention&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;In a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;non-volatile memory&lt;\/a&gt;, data retention is the amount of time the data that is stored in memory will retain its value without any power supply.&lt;\/p&gt;\n&lt;p&gt;In Non-Volatile memories, &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/retention\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;data retention&lt;\/a&gt; is measured in years and depends on the temperature.&lt;\/p&gt;\n&lt;p&gt;Read more about the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/reram-advantages\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;excellent data retention even at high temperatures&lt;\/a&gt; using &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot;&gt;RRAM&lt;\/a&gt;).&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/data-retention\/\" >Data Retention<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Die&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A small block of semiconducting material on which a given functional circuit is &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/fab\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;fabricated&lt;\/a&gt;. Typically, integrated circuits are produced in large batches on a single wafer through processes such as photolithography. The &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/wafer\/&quot;&gt;wafer&lt;\/a&gt; is cut (diced) into many pieces, each containing one copy of the circuit. Each of these pieces is called a die.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/die\/\" >Die<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Discrete Memory&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chip&lt;\/a&gt; that contains only memory.&lt;\/p&gt;\n&lt;p&gt;Read more about the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/discrete-chip-development\/&quot;&gt;Discrete Stand-alone Chip Development&lt;\/a&gt;.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/discrete-memory\/\" >Discrete Memory<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;DPM (Defects Per Million)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;The number of defective parts per million devices is a measure of quality in manufactured &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/silicon\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;silicon&lt;\/a&gt;.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/dpm-defects-per-million\/\" >DPM (Defects Per Million)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;DRAM&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Dynamic &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ram\/&quot;&gt;Random Access Memory&lt;\/a&gt; is a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/volatile-memory\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;volatile memory&lt;\/a&gt; that is typically used as a computer\u2019s main memory. DRAM is typically denser than &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/sram\/&quot;&gt;SRAM&lt;\/a&gt; but is slower to access and requires to be periodically refreshed.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/dram\/\" >DRAM<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-e mix\" data-filter-base=\"e\"><h3 class=\"wpg-list-block-heading\">E<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;ECC (Error Correction Code)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;ECC encompasses a wide range of mathematical methods to detect and correct errors introduced by noise when data is read or transmitted.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/ecc-error-correction-code\/\" >ECC (Error Correction Code)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;eFlash \u2013 Embedded Flash&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;non-volatile memory&lt;\/a&gt; commonly used in microcontrollers and &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/system-on-a-chip-soc\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;SoC&lt;\/a&gt;s for firmware, secure keys, or calibration data. Embedded &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/flash\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;flash&lt;\/a&gt; stores data using floating-gate transistors that trap electrical charges, representing binary data. This technology has limitations when scaling lower geometries (see &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/nanometer-nm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Nanometer&lt;\/a&gt;). Embedded flash is typically implemented at mature nodes (e.g., 40nm, 65nm) where process constraints still allow it.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/eflash-embedded-flash\/\" >eFlash \u2013 Embedded Flash<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Embedded Memory \/ Embedded NVM&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Embedded Memory \/ Embedded &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;NVM&lt;\/a&gt; is a memory that is integrated into an &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot;&gt;Integrated Circuit&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot;&gt;IC&lt;\/a&gt;) or a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/system-on-a-chip-soc\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;system-on-chip (SoC)&lt;\/a&gt; with other elements such as a processor.&lt;\/p&gt;\n&lt;p&gt;Weebit &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Embedded RRAM&lt;\/a&gt; \/ &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ReRAM\u00a0 IP&lt;\/a&gt; is available as embedded modules in different storage capacities. It is available now in &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/embedded-reram-rram-nvm-ip\/products\/WBT-SKYT-S130-v256-ReRAM&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;SkyWater Technology\u2019s S130 process&lt;\/a&gt;.\u00a0It is customizable for other foundries and process nodes from 180nm to 22nm and below.&lt;\/p&gt;\n&lt;p&gt;Read more about &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/embedded-reram-ip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ReRAM IP for your embedded design&lt;\/a&gt;.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/embedded-nvm-memory\/\" >Embedded Memory \/ Embedded NVM<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Emerging Memory \/ Emerging NVM&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Traditional memory technologies are facing challenges in being able to support the future performance, cost and power requirements of applications such as artificial intelligence (AI). The industry is looking to meet these requirements through &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/emerging-memory-emerging-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;emerging memory&lt;\/a&gt; technologies such as &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot;&gt;RRAM&lt;\/a&gt;), a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot;&gt;Non-Volatile Memory&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot;&gt;NVM&lt;\/a&gt;) technology that offers a promising alternative to &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/flash\/&quot;&gt;flash&lt;\/a&gt; or &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/eflash-embedded-flash\/&quot;&gt;eFlash&lt;\/a&gt;.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/emerging-memory-emerging-nvm\/\" >Emerging Memory \/ Emerging NVM<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Endurance&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Read or Write Endurance is the number of times a block of memory can be programmed and erased (P\/E cycles) before the memory wears out and stored data becomes unreliable. &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/dram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;DRAM&lt;\/a&gt; and &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/sram\/&quot;&gt;SRAM&lt;\/a&gt; has very high cycling endurance, typically 10&lt;sup&gt;15&lt;\/sup&gt;, while &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/flash\/&quot;&gt;Flash memory&lt;\/a&gt; usually attains much lower endurance, typically 10&lt;sup&gt;4&lt;\/sup&gt;.&lt;\/p&gt;\n&lt;p&gt;Read more about &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot;&gt;RRAM&lt;\/a&gt;) &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/reram-advantages\/&quot;&gt;High Endurance technology&lt;\/a&gt;.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/endurance\/\" >Endurance<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-f mix\" data-filter-base=\"f\"><h3 class=\"wpg-list-block-heading\">F<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Fab&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A factory where semiconductor devices are fabricated.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/fab\/\" >Fab<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;FDSOI&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Fully Depleted Silicon-on-Insulator (FDSOI) is a process technology designed to deliver the benefits of reduced &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/silicon\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;silicon&lt;\/a&gt; geometries while simplifying the manufacturing process \u2013 continuing to deliver higher performance while keeping leakage under control.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/fdsoi\/\" >FDSOI<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;FEOL (Front-End-of-Line) Memory&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Semiconductor manufacturing includes both front-end-of-line (FEOL) and &lt;a href=&quot;https:\/\/eur05.safelinks.protection.outlook.com\/?url=https%3A%2F%2Fwww.weebit-nano.com%2Fdefinition%2Fbeol-memory%2F&amp;data=05%7C02%7Cela%40weebit-nano.com%7C88477402bf2c4abcfb1508dce769f908%7C1dba2622540a4236befc22c3e3a56003%7C0%7C0%7C638639689539060112%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&amp;sdata=uaJg5YjsqMfFzUmL1R6RxbATyIPHM9btcVO9a4wgjh0%3D&amp;reserved=0&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;back-end-of-line (BEOL)&lt;\/a&gt; processes. In FEOL, the integrated circuit is formed on the\u00a0&lt;a href=&quot;https:\/\/eur05.safelinks.protection.outlook.com\/?url=https%3A%2F%2Fwww.weebit-nano.com%2Fglossary%2Fwafer%2F&amp;data=05%7C02%7Cela%40weebit-nano.com%7C88477402bf2c4abcfb1508dce769f908%7C1dba2622540a4236befc22c3e3a56003%7C0%7C0%7C638639689539087477%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&amp;sdata=R46St%2B3LwD1AhAJD3uxXk7vhGYoW1CcIMsZLwbDF70E%3D&amp;reserved=0&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;wafer&lt;\/a&gt;\u00a0substrate. While FEOL defines and makes the transistors \u2013 which are the switching elements used for computing \u2013 the BEOL represents the interconnecting layers that connect the transistors on the wafer using metal layer processing techniques. Weebit\u2019s\u00a0&lt;a href=&quot;https:\/\/eur05.safelinks.protection.outlook.com\/?url=https%3A%2F%2Fwww.weebit-nano.com%2Fglossary%2Freram%2F&amp;data=05%7C02%7Cela%40weebit-nano.com%7C88477402bf2c4abcfb1508dce769f908%7C1dba2622540a4236befc22c3e3a56003%7C0%7C0%7C638639689539103501%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&amp;sdata=L4xL8lnJYzZ12%2FLoUAOt0z46os3S69I0%2FA%2Bw4B2%2Fbpo%3D&amp;reserved=0&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ReRAM&lt;\/a&gt;\u00a0(&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;RRAM&lt;\/a&gt;) is integrated during the BEOL process.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/feol-front-end-of-line-memory\/\" >FEOL (Front-End-of-Line) Memory<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Flash&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;non-volatile memory&lt;\/a&gt; storage. The two main types of flash memory are &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/nand-flash\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;NAND flash&lt;\/a&gt; and &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/nor-flash\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;NOR flash&lt;\/a&gt; memories. &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/flash\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Flash&lt;\/a&gt; memory is used in USB flash drives, solid-state drives, smartphones, and other consumer electronic devices.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/flash\/\" >Flash<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;FRAM (Ferroelectric Random Access Memory)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;non-volatile memory&lt;\/a&gt; that uses a thin ferroelectric material layer that changes\u00a0polarity\u00a0when an electric current is applied. When the current is shut off, the layer retains that last polarity, and the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chip&lt;\/a&gt; holds the data. This type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;NVM&lt;\/a&gt; is generally for &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/reram-advantages\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;low-density requirements&lt;\/a&gt;.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/fram-ferroelectric-random-access-memory\/\" >FRAM (Ferroelectric Random Access Memory)<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-g mix\" data-filter-base=\"g\"><h3 class=\"wpg-list-block-heading\">G<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Geometry&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;The basic size of a unit in a specific &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/fab\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;fab&lt;\/a&gt; process, measured in nanometers. The smallest geometry that the market has reached to-date is 7nm, but many fabs still operate at 10nm, 16nm, 28nm, 40nm, 65nm, 90nm, 130nm, 180nm and other geometries.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/geometry\/\" >Geometry<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-h mix\" data-filter-base=\"h\"><h3 class=\"wpg-list-block-heading\">H<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;HRS (High Resistance State)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;With &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;RRAM&lt;\/a&gt;), the state in which the filament between the top and bottom electrodes is &lt;strong&gt;dissolved&lt;\/strong&gt; is called HRS.&lt;br \/&gt;\nThis represents a logical 0.&lt;\/p&gt;\n&lt;p&gt;Also see &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/lrs-low-resistance-state\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;LRS&lt;\/a&gt;.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/hrs-high-resistance-state\/\" >HRS (High Resistance State)<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-i mix\" data-filter-base=\"i\"><h3 class=\"wpg-list-block-heading\">I<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;IC (Integrated Circuit)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Also called a \u2018&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chip&lt;\/a&gt;\u2019 or \u2018microchip\u2019, an IC is a small electronic device comprising multiple interconnected electronic components such as transistors, resistors, and diodes.&lt;br \/&gt;\nAn &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/system-on-a-chip-soc\/&quot;&gt;SoC&lt;\/a&gt; is a type of IC.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/\" >IC (Integrated Circuit)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;In-Memory Compute \/ Processing In-Memory&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;With in-memory compute, the memory cell is used both for data storage and computation, so processing is done within the memory. There is a general trend in computing architectures to move the memory closer to compute to reduce data movement and bandwidth and increase processing speed.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/in-memory-compute-processing-in-memory\/\" >In-Memory Compute \/ Processing In-Memory<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-l mix\" data-filter-base=\"l\"><h3 class=\"wpg-list-block-heading\">L<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;LRS (Low Resistance State)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;With &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;RRAM&lt;\/a&gt;), the state in which the filament between the top and bottom electrodes is &lt;strong&gt;formed&lt;\/strong&gt; is called LRS.&lt;br \/&gt;\nThis represents a logical 1.&lt;\/p&gt;\n&lt;p&gt;Also see &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/hrs-high-resistance-state\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;HRS&lt;\/a&gt;.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/lrs-low-resistance-state\/\" >LRS (Low Resistance State)<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-m mix\" data-filter-base=\"m\"><h3 class=\"wpg-list-block-heading\">M<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Mask&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Masks are used to produce a pattern on a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/wafer\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;wafer&lt;\/a&gt;. Several masks are used in turn, each one reproducing a layer of the completed design, and together they are known as a\u00a0mask set.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/mask\/\" >Mask<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Memory Cell&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Similar to a bit cell, or a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/bit-cell\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Bitcell&lt;\/a&gt;, is the basic building block of a memory array, and in turn, of a memory &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chip&lt;\/a&gt;. Each cell comprises a tiny circuit with a memory element and a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/glossary\/selector\/&quot;&gt;selector&lt;\/a&gt; element. The memory element stores data (either a 1 or 0), and the selector activates the cell when accessed.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/memory-cell\/\" >Memory Cell<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Memory Module&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;When embedding a memory array in a System-on-Chip (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/glossary\/system-on-a-chip-soc\/&quot;&gt;SoC&lt;\/a&gt;),\u00a0the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/memory-module\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;memory module&lt;\/a&gt; provides an interface between the memory array and the rest of the system, and also controls the array and how it is accessed.&lt;br \/&gt;\nIn Weebit\u2019s &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot;&gt;RRAM&lt;\/a&gt;) case, the memory module also integrates smart algorithms and design techniques that maintain the memory\u2019s endurance and long-term reliability.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/memory-module\/\" >Memory Module<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Memristor&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;In a memristor device, resistance can be programmed (resistor), and that data can be stored (memory). At a basic level, &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot;&gt;RRAM&lt;\/a&gt;) is a memristor device.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/memristor\/\" >Memristor<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Microcontroller (MCU)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;An MCU is an &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;integrated circuit&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot;&gt;IC&lt;\/a&gt;) incorporating a processor (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/cpu\/&quot;&gt;CPU&lt;\/a&gt;), memory, and programmable input\/output peripherals, which is designed to control a specific function of an electronic product. \u2018MCU\u2019 can also refer to a microprocessor core\/embedded controller targeted for these types of designs.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/microcontroller-mcu\/\" >Microcontroller (MCU)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;MRAM&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Magnetic &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;random-access memory&lt;\/a&gt; is a type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot;&gt;non-volatile random-access memory&lt;\/a&gt; that works by changing the magnetic spin of electrons rather than directly storing charge. The fabrication of MRAM requires the usage of non-standard magnetic materials in the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/fab\/&quot;&gt;fab&lt;\/a&gt;.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/mram\/\" >MRAM<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;MTP (Multi-Time Programmable)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;non-volatile memory&lt;\/a&gt; that can be programmed and reprogrammed a limited number of times.&lt;br \/&gt;\nUsually suitable for very low-density arrays.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/mtp-multi-time-programmable\/\" >MTP (Multi-Time Programmable)<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-n mix\" data-filter-base=\"n\"><h3 class=\"wpg-list-block-heading\">N<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;NAND (3D) Flash&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A type of NAND &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/flash\/&quot;&gt;flash&lt;\/a&gt; where multiple layers of memory cells are stacked on top of each other. This enables growing the amount of memory on a specific memory &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot;&gt;chip&lt;\/a&gt; without shrinking the memory &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/bit-cell\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;bit&lt;\/a&gt; size.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/nand-3d-flash\/\" >NAND (3D) Flash<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;NAND Flash&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/flash\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Flash memory&lt;\/a&gt; that is used for mass data storage such as pictures and video files. Its main storage devices are memory cards, USB drives and solid-state drives (SSD).&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/nand-flash\/\" >NAND Flash<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Nanometer (nm)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;One billionth (10&lt;sup&gt;-9&lt;\/sup&gt;) of a meter. It is widely used as a scale for building tiny, complex, and atomic scale computing and electronic components - specifically in nanotechnology.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/nanometer-nm\/\" >Nanometer (nm)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Neuromorphic Computing&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A neuromorphic computing system processes information in a way that mimics how the human brain works. It relies on electronic analog hardware circuits operating asynchronously, while using a resistive memory cell to store and compute basic neural network operations. This contrasts with traditional digital neural network architectures whereby computing is performed using dedicated synchronous signal processing elements, while data resides in separate memory structures.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/neuromorphic-computing\/\" >Neuromorphic Computing<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Non-volatile Memory (NVM)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A computer memory that retains its data even when the power supply is disconnected, and thus is used for storage of data. Examples are USB sticks or solid-state drives.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/\" >Non-volatile Memory (NVM)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;NOR Flash&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/flash\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Flash&lt;\/a&gt; architecture that is mainly used for storing the execution code of a system.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/nor-flash\/\" >NOR Flash<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-o mix\" data-filter-base=\"o\"><h3 class=\"wpg-list-block-heading\">O<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;OTP (One-Time Programmable)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;non-volatile memory&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;NVM&lt;\/a&gt;) that can be programmed one time. It is used for specific applications that do not need to be re-programmed. It is suitable for very &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/reram-advantages\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;low-density arrays&lt;\/a&gt;.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/otp-one-time-programmable\/\" >OTP (One-Time Programmable)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Oxide&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;An oxide is a chemical compound that contains at least one oxygen atom and one other element in its chemical formula. Oxide materials are fab-friendly for easy manufacturability.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/oxide\/\" >Oxide<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;OxRAM&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Oxide-based (Ox) &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ram\/&quot;&gt;Random Access Memory&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ram\/&quot;&gt;RAM&lt;\/a&gt;) is a type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot;&gt;ReRAM&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot;&gt;RRAM&lt;\/a&gt;).&lt;br \/&gt;\nOxRAM cells are generally comprised of a transition metal &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/oxide\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;oxide&lt;\/a&gt; layer sandwiched between two metal electrodes.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/oxram\/\" >OxRAM<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-p mix\" data-filter-base=\"p\"><h3 class=\"wpg-list-block-heading\">P<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;PCM (Phase Change Memory)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;non-volatile memory&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;NVM&lt;\/a&gt;) based on the ability to change the physical state of a material from an amorphous solid to a crystalline solid and back again. The material changes state when an electric current is applied. This type of NVM has unique material requirements, making it expensive to implement.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/pcm-phase-change-memory\/\" >PCM (Phase Change Memory)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;PDK – Process Design Kit&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A PDK (Process Design Kit) is a library of basic components that are technically and geometrically represented to enable &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chip&lt;\/a&gt; designers to design a wide variety of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;integrated circuits&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ICs&lt;\/a&gt;) using the components of a particular production &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/fab\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;fab&lt;\/a&gt;. It contains the data required for the different tools used during the design process.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/pdk\/\" >PDK – Process Design Kit<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Persistent Memory (PM)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Persistent Memory (PM) modules are a new type of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;non-volatile&lt;\/a&gt;, low latency memory that can be used as top-tier storage. PM provides higher throughput than solid state drives (SSDs) and &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot;&gt;NVM&lt;\/a&gt;s, bridging the gap between &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/dram\/&quot;&gt;DRAM&lt;\/a&gt; and disk storage.&lt;br \/&gt;\nSee &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/storage-class-memory-scm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Storage Class Memory\/SCM&lt;\/a&gt;.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/persistent-memory-pm\/\" >Persistent Memory (PM)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;PMIC&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A Power Management &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Integrated Circuit&lt;\/a&gt; (PMIC) performs various functions related to managing power in electronic devices that have a range of requirements, such as multiple internal voltages and external power sources.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/pmic\/\" >PMIC<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-q mix\" data-filter-base=\"q\"><h3 class=\"wpg-list-block-heading\">Q<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Qualification&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;The process in which the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/fab\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;fab&lt;\/a&gt; ensures that a design is ready for mass production and meets its specifications. This includes ensuring that it is stable, operates reliably as designed and meets yield targets and quality standards.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/qualification\/\" >Qualification<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-r mix\" data-filter-base=\"r\"><h3 class=\"wpg-list-block-heading\">R<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Radiation Tolerant \/ Radiation Hardened (Rad Hard)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Radiation tolerant electronics are less susceptible to damage from exposure to radiation (such as that in aerospace and some industrial and medical applications). Radiation hardened devices are designed and produced to withstand even greater amounts of radiation.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/radiation-tolerant-radiation-hardened-rad-hard\/\" >Radiation Tolerant \/ Radiation Hardened (Rad Hard)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;RAM&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Random Access Memory, is a form of computer memory that can be read and written in any order, typically used to store working data and machine code.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/ram\/\" >RAM<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;ReRAM&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;ReRAM is a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/investors\/guide-to-reram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Resistive random-access memory&lt;\/a&gt; (ReRAM is sometimes spelled as &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;RRAM&lt;\/a&gt;) is a type of non-volatile random-access (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;NV&lt;\/a&gt;) memory that works by changing the resistance across a dielectric solid-state material rather than directly storing charge.&lt;\/p&gt;\n&lt;p&gt;&lt;img class=&quot;RRAM ReRAM aligncenter wp-image-12324 size-large&quot; title=&quot;Weebit Nano ReRAM RRAM memory technology for semiconductor chip manufacture design &quot; src=&quot;https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/09\/Weebit-ReRAM-RRAM-memory-technology-for-semiconductor-chip-manufacture-design-1024x613.png&quot; alt=&quot;Weebit Nano ReRAM RRAM memory technology for semiconductor chip manufacture design &quot; width=&quot;800&quot; height=&quot;479&quot; \/&gt;&lt;\/p&gt;\n&lt;p&gt;Read more about &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/embedded-reram-ip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ReRAM IP for your embedded design&lt;\/a&gt;&lt;\/p&gt;\n&lt;p&gt;Weebit &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Embedded RRAM&lt;\/a&gt; \/ &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ReRAM\u00a0 IP&lt;\/a&gt; is available as embedded modules in different storage capacities. It is available now in &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/embedded-reram-rram-nvm-ip\/products\/WBT-SKYT-S130-v256-ReRAM&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;SkyWater Technology\u2019s S130 process&lt;\/a&gt;.\u00a0It is customizable for other foundries and process nodes from 180nm to 22nm and below.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/\" >ReRAM<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Retention&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;See &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/data-retention\/&quot;&gt;Data Retention&lt;\/a&gt;.&lt;br \/&gt;\nIn a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;non-volatile memory&lt;\/a&gt;, data retention is the amount of time the data that is stored in memory will retain its value without any power supply.&lt;br \/&gt;\nIn Non-Volatile memories, data retention is measured in years and depends on the temperature.&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/retention\/\" >Retention<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;RRAM&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;RRAM, also referred as &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/reram-or-rram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ReRAM&lt;\/a&gt;, is a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/investors\/guide-to-reram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Resistive random-access memory&lt;\/a&gt;, a type of non-volatile random-access memory (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/non-volatile-memory-nvm\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;NVM&lt;\/a&gt;) that works by changing the resistance across a dielectric solid-state material rather than directly storing charge.&lt;\/p&gt;\n&lt;p&gt;&nbsp;&lt;\/p&gt;\n&lt;p&gt;&lt;img class=&quot;ReRAM RRAM memory aligncenter wp-image-12324 size-large&quot; title=&quot;Weebit Nano ReRAM RRAM memory technology for semiconductor chip manufacture design &quot; src=&quot;https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/09\/Weebit-ReRAM-RRAM-memory-technology-for-semiconductor-chip-manufacture-design-1024x613.png&quot; alt=&quot;Weebit Nano ReRAM RRAM memory technology for semiconductor chip manufacture design &quot; width=&quot;800&quot; height=&quot;479&quot; \/&gt;&lt;\/p&gt;\n&lt;p&gt;&nbsp;&lt;\/p&gt;\n&lt;p&gt;Weebit Embedded RRAM IP is available as embedded modules in different storage capacities. It is available now in &lt;a href=&quot;http:\/\/www.weebit-nano.com\/technology\/embedded-reram-rram-nvm-ip\/products\/WBT-SKYT-S130-v256-ReRAM&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;SkyWater Technology\u2019s S130 process&lt;\/a&gt;.\u00a0It is customizable for other foundries and process nodes from 180nm to 22nm and below.&lt;\/p&gt;\n&lt;p&gt;Read more about &lt;a href=&quot;https:\/\/www.weebit-nano.com\/technology\/embedded-reram-ip\/&quot;&gt;ReRAM IP for your embedded design&lt;\/a&gt;&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/rram\/\" >RRAM<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-s mix\" data-filter-base=\"s\"><h3 class=\"wpg-list-block-heading\">S<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Selector&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A selector is a device used in each &lt;a href=&quot;https:\/\/www.weebit-nano.com\/glossary\/bit-cell\/&quot;&gt;bit cell&lt;\/a&gt; in a memory array to ensure optimized cell access within the array, while suppressing unwanted current flow in unselected cells (called \u201csneak path\u201d current). The type of selector used has a significant impact on the area of a memory bit cell. In the embedded space, a transistor is typically used as the selector device, but density requirements in discrete &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chips&lt;\/a&gt; dictate the need to use other selector devices, such as an OTS selector.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/selector\/\" >Selector<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Silicon&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;This common chemical element (symbol Si) is a critical component in microelectronics \u2013 as well as numerous other products. The highly purified elemental silicon used in semiconductors is essential to the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;integrated circuit&lt;\/a&gt; &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot;&gt;chips&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;ICs&lt;\/a&gt;) used in most modern electronics.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/silicon\/\" >Silicon<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;SiOx&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Silicon Oxide, i.e. the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/oxide\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;oxide&lt;\/a&gt; of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/silicon\/&quot;&gt;Silicon&lt;\/a&gt;. The natural oxidation of Silicon is used to create isolating areas, simplifying the processability of Silicon. This fact &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/mask\/&quot;&gt;makes&lt;\/a&gt; Silicon the most dominant material in the semiconductor industry.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/siox\/\" >SiOx<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Spiking neural networks (SNNs)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Spiking neural networks are artificial neural networks that closely mimic the brain\u2019s biological neural networks. Compared to AI circuits which use standard processors to simulate the synaptic function, SNNs function very much like the neurons and synapses in the brain \u2013 in effect emulating brain behavior. See &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/neuromorphic-computing\/&quot;&gt;Neuromorphic Computing&lt;\/a&gt;.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/spiking-neural-networks-snns\/\" >Spiking neural networks (SNNs)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;SRAM&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Static &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;Random Access Memory&lt;\/a&gt;, a fast &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/volatile-memory\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;volatile memory&lt;\/a&gt; used to store local data and machine code. The term static differentiates SRAM from &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/dram\/&quot;&gt;DRAM&lt;\/a&gt;, as it does not require to be periodically refreshed. SRAM is faster and more expensive than DRAM and is typically directly connected to the fast &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/cpu\/&quot;&gt;CPU&lt;\/a&gt;, while slower DRAM is used for a computer&#039;s main memory.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/sram\/\" >SRAM<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Storage Class Memory (SCM)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;SCM represents a new tier of memory\/storage that has emerged to bridge the gap between main memory (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/dram\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;DRAM&lt;\/a&gt;), which is very fast but volatile, and storage (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/flash\/&quot;&gt;flash&lt;\/a&gt;\/SSD), which is non-volatile but slow and cheap. It is faster and lower power than flash and less expensive than DRAM. It is also non-volatile, and is targeted to accelerate storage in data centers, cloud computing, and mass storage devices.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/storage-class-memory-scm\/\" >Storage Class Memory (SCM)<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;System-on-a-Chip (SoC)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;Thanks to the constant shrinking of technology to smaller geometries, it is now possible to place a complete system on a single &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chip&lt;\/a&gt;, including processor(s), sensors, communication units, memories, etc.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/system-on-a-chip-soc\/\" >System-on-a-Chip (SoC)<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-t mix\" data-filter-base=\"t\"><h3 class=\"wpg-list-block-heading\">T<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Tape-out&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;The final phase of the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chip&lt;\/a&gt; design process in which the design is released to manufacturing.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/tape-out\/\" >Tape-out<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Transistor&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A transistor is a semiconductor device that amplifies or switches electrical signals and power. It is one of the basic building blocks of modern electronics.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/transistor\/\" >Transistor<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-v mix\" data-filter-base=\"v\"><h3 class=\"wpg-list-block-heading\">V<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Volatile Memory&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A computer memory that only maintains its data while the device is powered. When power is interrupted the stored data is lost.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/volatile-memory\/\" >Volatile Memory<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-w mix\" data-filter-base=\"w\"><h3 class=\"wpg-list-block-heading\">W<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Wafer&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;A thin slice of semiconductor, such as a crystalline &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/silicon\/&quot;&gt;silicon&lt;\/a&gt;, used for the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/fab\/&quot;&gt;fabrication&lt;\/a&gt; of &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot;&gt;integrated circuits&lt;\/a&gt; (&lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/chip\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;chips&lt;\/a&gt;). The wafer serves as the substrate for microelectronic devices built in and upon the wafer. Each wafer is diced to multiple &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/die\/&quot;&gt;dies&lt;\/a&gt;.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/wafer\/\" >Wafer<\/a><\/li><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Wafer Level Packaging (WLP) \/ Wafer Level Chip Scale Packaging (WLCSP)&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;With wafer-level packaging, &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/ic-integrated-circuit\/&quot;&gt;ICs&lt;\/a&gt; are packaged while they are still part of the &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/wafer\/&quot;&gt;wafer&lt;\/a&gt;, compared to the traditional process of being packaged after being sliced into individual &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/die\/&quot;&gt;dies&lt;\/a&gt;.&lt;\/p&gt;\n&lt;p&gt;&lt;img class=&quot;aligncenter wp-image-11598 size-large&quot; src=&quot;https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/05\/wafer-1024x562.jpg&quot; alt=&quot;&quot; width=&quot;800&quot; height=&quot;439&quot; \/&gt;&lt;\/p&gt;\n&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/wafer-level-packaging-wlp-wafer-level-chip-scale-packaging-wlcsp\/\" >Wafer Level Packaging (WLP) \/ Wafer Level Chip Scale Packaging (WLCSP)<\/a><\/li><\/ul><\/div><div class=\"wpg-list-block wpg-filter-y mix\" data-filter-base=\"y\"><h3 class=\"wpg-list-block-heading\">Y<\/h3><ul class=\"wpg-list-items\"><li class=\"wpg-list-item\"><a class=\"wpg-list-item-title wpg-tooltip\" title=\"&lt;h3 class=&quot;wpg-tooltip-title&quot;&gt;&lt;span class=&quot;wpg-tooltip-term-title&quot;&gt;Yield&lt;\/span&gt;&lt;\/h3&gt;&lt;div class=&quot;wpg-tooltip-content&quot;&gt;&lt;p&gt;The percentage of fully-functional &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/die\/&quot; target=&quot;_blank&quot; rel=&quot;noopener&quot;&gt;dies&lt;\/a&gt; within a &lt;a href=&quot;https:\/\/www.weebit-nano.com\/definition\/wafer\/&quot;&gt;wafer&lt;\/a&gt;.&lt;\/p&gt;&lt;\/div&gt;\" href=\"https:\/\/www.weebit-nano.com\/definition\/yield\/\" >Yield<\/a><\/li><\/ul><\/div><\/div><div class=\"wpg-clearfix\"><\/div><\/div><\/div>\n\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t","protected":false},"excerpt":{"rendered":"<p>Investors Glossary<\/p>\n","protected":false},"author":7,"featured_media":0,"parent":5023,"menu_order":12,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":"","_links_to":"","_links_to_target":""},"class_list":["post-6205","page","type-page","status-publish","hentry"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v26.1 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Glossary | Next-Gen Memory Technology | Weebit Nano<\/title>\n<meta name=\"description\" content=\"Looking for important terms in the next-gen memory technology niche? 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