{"id":16608,"date":"2025-06-19T11:24:25","date_gmt":"2025-06-19T08:24:25","guid":{"rendered":"https:\/\/www.weebit-nano.com\/?p=16608"},"modified":"2025-06-25T13:59:04","modified_gmt":"2025-06-25T10:59:04","slug":"enabling-few-shot-learningai-with-reram","status":"publish","type":"post","link":"https:\/\/www.weebit-nano.com\/enabling-few-shot-learningai-with-reram\/","title":{"rendered":"Enabling \u2018Few-Shot Learning\u2019
AI with ReRAM"},"content":{"rendered":"

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AI training happens in the cloud because it\u2019s compute-intensive and highly parallel. It requires massive datasets, specialized hardware, and weeks of runtime. Inference, by contrast, is the deployment phase \u2014 smaller, faster, and often done at the edge, in real time. The cloud handles the heavy lifting; the edge delivers the result. Now, recent advances in resistive memory technology are making edge AI inferencing more energy-efficient, secure, and responsive.<\/p>\n

At the 2025 IEEE Symposium on VLSI Technology and Circuits<\/a>, researchers from CEA-Leti<\/a>, Weebit Nano, and the Universit\u00e9 Paris-Saclay<\/a> presented a breakthrough in \u201con-chip customized learning\u201d \u2014 demonstrating how a ReRAM-based platform can support few-shot learning<\/em> using just five training updates.<\/p>\n

Few-shot learning (FSL) is an approach where AI models learn new tasks with only a handful of examples. It is very useful for edge applications, where devices must adapt to specific users or environments and can\u2019t rely on large, labeled datasets.<\/p>\n

The team didn\u2019t just train a model \u2014 they showed that a memory-embedded chip could adapt in real-time, at the edge, without requiring cloud access, long training cycles, or power-hungry hardware. The core enabler is a combination of Model-Agnostic Meta-Learning (MAML) and multi-level Resistive RAM<\/a> (ReRAM<\/a> or RRAM<\/a>).<\/p>\n

MAML provides a clever workaround that can enable learning in power-constrained edge devices. Instead of training from scratch, it trains a model to learn<\/em>. During an off-chip phase, the system builds a general-purpose model by exposing it to many tasks. This \u201clearned initialization\u201d is then deployed to edge devices, where it can quickly adapt to new tasks with minimal effort.<\/p>\n

This means:<\/p>\n