{"id":12030,"date":"2022-06-16T15:09:07","date_gmt":"2022-06-16T12:09:07","guid":{"rendered":"https:\/\/www.weebit-nano.com\/?p=12030"},"modified":"2025-06-25T14:21:41","modified_gmt":"2025-06-25T11:21:41","slug":"weebit-reram-results-high-temperature-stability-at-28nm-embedded-rram","status":"publish","type":"post","link":"https:\/\/www.weebit-nano.com\/weebit-reram-results-high-temperature-stability-at-28nm-embedded-rram\/","title":{"rendered":"Weebit ReRAM Results: <br>High Temperature Stability at 28nm"},"content":{"rendered":"<p>As embedded memories move below 28nm process geometries, it is becoming more and more complex and expensive to scale standard memories that are charge-based (those that store data as an electrical charge like flash) and integrate them with advanced CMOS nodes.<\/p>\n<p>There is high demand to scale memory nodes further for applications like microcontrollers (MCUs) for automotive and other markets, as well as artificial intelligence (AI) applications. This is driving the industry search for non-volatile memory (NVM) alternatives to embedded flash.<\/p>\n<p>Memories that are integrated in the back end of line (BEOL) of the manufacturing process like ReRAM are attracting growing interest because, unlike flash, these memories don\u2019t interfere with the integration of analog components in the front end and are therefore easier to integrate with the design. With its faster speed, lower power consumption and lower additional mask count compared to flash memory, ReRAM is increasingly of interest to the industry, and great strides are being made in its development into a mature technology.<\/p>\n<p>Together with CEA-Leti, Weebit recently published a paper, \u201cHigh temperature stability embedded ReRAM for 2x nm node and beyond,\u201d outlining performance results of Weebit ReRAM in 28nm. The results highlight some of the many advantages of Weebit ReRAM. We presented these results at the recent <a href=\"https:\/\/www.ewh.ieee.org\/soc\/eds\/imw\/\">International Memory Workshop (IMW) 2022<\/a>.<\/p>\n<p><strong>High temperature stability<\/strong><\/p>\n<p>For many applications such as automotive, aerospace and defense and others, memory retention and stability at high temperatures is critical. In ReRAM technologies, retention failures are usually caused by filament dissolution resulting from motion and recombination of oxygen vacancies, which happens as temperatures increase, causing the atoms to move. This can cause the filament to become less conductive or to dissolve, leading to increased resistance of the memory cell.<\/p>\n<p>Weebit has optimized the materials and engineered the Weebit ReRAM stack to limit the motion of the oxygen vacancies caused by increased temperatures, making the filament more stable over time.<\/p>\n<p>Our results show that Weebit ReRAM in 28nm achieves a low raw bit error rate (BER) without any need for error correcting code (ECC) or redundancy. Specifically, we show the ability of Weebit ReRAM to maintain a stable memory window after 15 hours\u2019 bake at 210\u00b0C after 10,000 cycles. To the best of our knowledge, this is one of the best results ever reported for any company\u2019s ReRAM.<\/p>\n<p><img fetchpriority=\"high\" decoding=\"async\" class=\"aligncenter wp-image-12031 size-full\" src=\"https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/06\/Weebit-ReRAM-provides-stable-memory-window-after-15-hours-bake-at-210-C-after-10000-cycles.png\" alt=\"\" width=\"679\" height=\"396\" srcset=\"https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/06\/Weebit-ReRAM-provides-stable-memory-window-after-15-hours-bake-at-210-C-after-10000-cycles.png 679w, https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/06\/Weebit-ReRAM-provides-stable-memory-window-after-15-hours-bake-at-210-C-after-10000-cycles-300x175.png 300w\" sizes=\"(max-width: 679px) 100vw, 679px\" \/><\/p>\n<p style=\"text-align: center;\"><em>Image: Weebit ReRAM maintains a stable memory window after 15 hours\u2019 bake at 210\u00b0C after 10,000 cycles (without using a Program &amp; Verify algorithm).<\/em><\/p>\n<p>&nbsp;<\/p>\n<p><strong>The importance of endurance<\/strong><\/p>\n<p>While endurance of 10,000 programming operations is sufficient to address many applications today, endurance above 100,000 operations is required for any NVM to be a contender for next-generation applications, with some applications even requiring up to 1 million operations.<\/p>\n<p>In ReRAM technologies, endurance failures happen when the resistance window narrows. This can happen when there is degradation (of the dielectric material on the switching layer due to defect generation. This can cause resistance to drop to an intermediate resistance between the High Resistive State (HRS) and Low Resistive State (LRS) or be stuck at the LRS.<\/p>\n<p><a href=\"https:\/\/www.weebit-nano.com\/technology\/reram-bitcell\/\"><img decoding=\"async\" class=\"aligncenter wp-image-11810 \" src=\"https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/05\/how-2.svg\" alt=\"\" width=\"563\" height=\"300\" \/><\/a><\/p>\n<p style=\"text-align: center;\"><em>Image: In the ReRAM forming step, a positive voltage is applied on the switching layer, creating the filament and changing the resistance of the oxide layer to LRS (read more <\/em><a href=\"https:\/\/www.weebit-nano.com\/technology\/reram-bitcell\/\"><em>here<\/em><\/a><em>). Endurance failures happen when the resistance window collapses. <\/em><\/p>\n<p><em>\u00a0<\/em><\/p>\n<p>In any NVM, as the number of Program\/Erase cycles increases, endurance failures may occur. To avoid this, it\u2019s critical to make optimizations such as adjusting programming conditions, optimizing the programming energy, and trading off with the window margin.<\/p>\n<p>Since electrical current flowing through the dielectric degrades that material over time, the key is to provide enough current to create a robust filament, but no more energy than that. Because we know how parameters such as voltage and time will impact the resistance window, we\u2019ve made optimizations in Weebit ReRAM to ensure we are providing enough current to create the filament but not wasting energy that can degrade the dielectric. We filed for several patents related to how we implement these optimizations.<\/p>\n<p>In our paper, we show that Weebit ReRAM can endure more than 10<sup>5<\/sup> cycles with no memory degradation, and no failure on 16kb arrays. This was achieved based on a single programming pulse without using a program and verify (P&amp;V) algorithm (which would have enabled adjustments to be made throughout the cycling). The results are based on raw data, reflecting the intrinsic quality of the Weebit ReRAM technology and memory stack. In addition, 10<sup>6<\/sup> cycles are achievable with some optimizations.<\/p>\n<p><strong>Other Key Findings<\/strong><\/p>\n<p>The new paper outlines many other findings based on a wide array of tests. One example is testing for solder reflow compliance. Since most assembly processes require short bursts of very high-temperature soldering (up to three cycles), it\u2019s critical that the NVM retain its programmed data during this process. NVM technology must sustain the Pb-free solder reflow profile as described on JEDEC standards (IPC\/JEDEC J-STD-020D.1), with a 260\u00b0C temperature peak. Weebit ReRAM passed basic (3x reflow) and extended (9 cycles) SMT (Surface Mount Technology) tests with zero failures.<\/p>\n<p>In addition to tests that show raw data \u2013 highlighting the intrinsic performance aspects of Weebit ReRAM \u2013 we also showed how technology enhancements and forming protocol optimizations can optimize device performance. And the paper highlights the results we achieved using a P&amp;V (Program and Verify) algorithm. In a real product, such an algorithm is used to make optimizations\/reprogramming tweaks after each programming operation. Using a P&amp;V algorithm, Weebit ReRAM achieved a clear window margin with zero failures on a 1Mb array.<\/p>\n<p>The conclusion of all of our tests show that Weebit ReRAM is a highly reliable ReRAM technology when integrated in 28nm. As we continue our progress toward productization, and also work on 22nm and below, these results go a long way in showing that customers can be confident in engaging with Weebit for next-generation designs.<\/p>\n<p><a href=\"https:\/\/www.weebit-nano.com\/wp-content\/uploads\/2022\/06\/IMW2022_Weebit_High-temperature-stability-embedded-ReRAM-or-RRAM-for-2x-nm-node-and-beyond.pdf\">Read the paper<\/a>.<\/p>\n<p>By Gabriel Molas, Weebit Chief Scientist<\/p>\n","protected":false},"excerpt":{"rendered":"<p>As embedded memories move below 28nm process geometries, it is becoming more and more complex and expensive to scale standard memories that are charge-based (those that store data as an electrical charge like flash) and integrate them with advanced CMOS nodes. There is high demand to scale memory nodes further for applications like microcontrollers (MCUs) [&hellip;]<\/p>\n","protected":false},"author":16,"featured_media":12029,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":"","_links_to":"","_links_to_target":""},"categories":[1,61,66],"tags":[],"class_list":["post-12030","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-general","category-power-management","category-tech-deep-dive"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v26.1 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>ReRAM | RRAM Blog by Weebit Nano<\/title>\n<meta name=\"description\" content=\"Read Weebit Blog: Technology updates, industry trends, NVM embedded ReRAM (RRAM) IP developments replace Flash (eFlash) memory in high temperature stability at 28nm\" \/>\n<meta name=\"robots\" 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